Senior VLSI Verification Engineer - Azure Core
Tel Aviv, Haifa, Israel | Hardware Engineering | Mar 02, 2022

Microsoft Azure Networking ILDC (Microsoft Israel Development Center) team is a new and fast growing team, with multiple intriguing projects in different networking and security areas.  


As the one of the largest public cloud platforms worldwide, Azure provides a great channel for product impact that touches the lives of millions of users daily, in an environment at the cutting edge of high-performance computing and networking.


We leverage the flexibility and parallelism delivered by FPGAs to radically accelerate many types of computations and functions of the Azure network. Our vertical work environment includes developing and deploying hardware devices, drivers, end to end features, and interaction with large software teams on important customer-facing applications.


We are looking for excellent Logic Design engineers who want to: 

  • Create, impact and collaborate with the best-in-class engineers 
  • Be part of building a new team and contribute to its success. 
  • Innovate, solve problems and work as part of a team. 
  • Build network systems and services, taking products all the way from an idea to production. 


You will be responsible for micro-architecting and designing new features, testing and deploying at scale while collaborating with different partners in Azure Networking team in Israel and US



For more information about Azure Networking:
Azure Networking - The Atlas Podcast | Podcast on Spotify
Microsoft R&D - Blog - Azure Networking (





  • Design verification environment for units and fully integrated devices, based on deep understanding of customer requirements, DUT functionality, and system architecture.
  • Design and implement VIP, test benches, and verification infrastructure in System Verilog/UVM.
  • Develop and execute test/coverage plans to verify hardware/software designs and reach cloud-scale quality.
  • Work with hardware-based validation platforms, as part of the verification and validation flow.
  • Collaborate closely with hardware and software teams.


Key Qualifications:

  • 7+ years of proven hands-on experience in verification of large, complex ASIC or FPGA designs
  • Good knowledge of hardware verification concepts and tools (UVM, unit level and full chip verification, coverage-based verification)
  • Desire to handle a wide array of challenges, with a versatile can-do attitude.
  • Excellent communication skills in English.
  • BSc/MSc in Electrical Engineering, Computer Engineering, or equivalent experience.

Preferred Qualifications

  • Familiarity with the following technologies: Networking protocols, RDMA, PCIe/CXL
  • Professional working experience with System Verilog or e languages
  • Demonstrated experience in developing test benches from scratch using UVM or Specman methodologies.
  • Hands-on debug experience on hardware-based validation platform (g., ASIC emulation on FPGAs).
  • Strong scripting skills in Python, Perl, and other scripting languages.
  • Experience with developing or verifying networking systems such as switches/routers, packet processors, or NPUs.


Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.


Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.