Hardware Verification Engineer - Azure Core
Tel Aviv, Haifa, Israel | Hardware Engineering | Oct 17, 2021

Microsoft Azure is building the fastest and most reliable storage network in the public cloud. As the one of the largest public cloud platforms worldwide, Azure provides a great channel for product impact that touches the lives of millions of users daily, in an environment at the cutting edge of high-performance computing and networking.

Microsoft R&D Israel is looking for talented engineers to join our verification team, developing Azure’s next generation networking devices. 

We leverage the flexibility and parallelism delivered by FPGAs to radically accelerate many types of computations and functions of the Azure network. Our vertical work environment includes developing and deploying FPGA devices, drivers, and end to end features, and interaction with large software teams on important customer-facing applications.

Come join us and be challenged daily as you build acceleration hardware for some of the world’s largest datacenter networks. This is a great opportunity to learn from and join a team that has built some of the largest scale cloud systems ever deployed!


Candidate Responsibilities:

  • Design and implement VIP, test benches, and verification infrastructure in SystemVerilog/UVM.
  • Develop and execute test/coverage plans to verify hardware/software designs and reach cloud-scale quality.
  • Work with hardware-based validation platforms, as part of the verification and validation flow.
  • Collaborate closely with hardware and software teams.


Candidate Requirements:

  • 3+ years of proven experience in verification of ASIC/FPGA designs 
  • Knowledge of hardware verification concepts and tools (unit level or full chip verification, coverage) 
  • Excellent communication skills in English.
  • BSc/MSc in Electrical Engineering, Computer Engineering, or equivalent. 


Preferred Experience: 

  • Professional working experience with System Verilog or e languages
  • Demonstrated experience in developing test benches from scratch using UVM or Specman methodologies.
  • Hands-on debug experience on hardware-based validation platform (ASIC emulation on FPGAs).  
  • Strong scripting skills in Python, Perl, and other scripting languages


Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.


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